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Capacity Building

A. Chips to Startup (C2S) Programme:

The C2S Programme aims to train 85,000 number of Specialized Manpower at about 100 participating Institutions (including Academia, R&D Organization, Startups, MSMEs) over a period of 5 years in the area of VLSI and Embedded System Design and leapfrog in ESDM space by way of inculcating the culture of System-on-Chip (SoC)/ System Level Design at Bachelors, Masters and Research level and act as a catalyst for growth of Start-ups involved in fabless design.

C2S programme would not only generate 85,000 number of Specialized Manpower at B.Tech, M.Tech& PhD level in Chip design area; but also results in the development of 20 Systems/ 175 Chips/ 30 reusable IP Cores and incubating 25 startups in this area.Details here

Broad Objectives of the C2S Programme:

a. Generating Industry-ready manpower in System/ SoC Design area for creating vibrant fabless chip design ecosystem in the country.

b. Promoting industry-led R&D, translational research and strengthening Industry-Academia collaboration.

c. Leapfrogging in ESDM space by way of inculcating the culture of developing reusable IP Cores & developing ASIC/ SoC/ Systems for societal/ strategic sectors.

d. Broaden the base of ASIC / IC design in the Country by accommodating more academic institutions, start-ups for design of IPs / ASICs / Systems/ SoCs.

e. Protection of Intellectual Property generated etc.

f. To inculcate the culture of entrepreneurship among students & researchers by way of incubating startups.

Major Achievements:

Earlier “Special Manpower Development Programme for Chips to System Design (SMDP-C2SD)”was initiated by MeitY with an aim to train 50,000 number of specialized manpower in the area of VLSI design and moving up in the value chain in the “System Design Space” by inculcating the culture of System-on-Chip (SoC)/System Level Design at Bachelors, Masters and Research level. The Programme wer implemented at 60 Academic/Research & Development institutions spread across the country including IITs, NITs, IISc, IIITs, IISc & other Engineering Colleges. Details here.

Under the Programme, following achievements are done:

(i) State-of-the-art VLSI Laboratories equipped with advanced EDA tools setup at 60 institutes. Details at http://smdpc2sd.gov.in/equipments

(ii) About 75,000 number of specialized manpower trained at B. Tech, M. Tech and PhD levels

(iii) Working Prototypes of 15 15 Systems have been developed and Proof-of-concept demonstrated in close consultation with end-users.

(iv) Model Syllabus developed for SoCs and embedded systems and adopted by Institutes.

(v) M. Tech in VLSI design & related areas initiated at 18 institutions which didn’t have these courses earlier.

(vi) About 110 designs fabricated by 60 academic institutions at SCL Mohali foundry & foundries outside the country. These 110 Chips, designed indigenously from the scratch, will be used in 15 Working Prototype SoCs/ Systems, being developed for Strategic & Societal sectors. Details at http://smdpc2sd.gov.in/asics

(vii) Chip Centre has been setup at CDAC-Bangalore. So far, 78 ASICs Chips fabricated at SCL in MPW manner through Chip Centre.

(viii) Interactive website developed (http://www.smdpc2sd.gov.in) & being used to disseminate project information including interactive forums to discuss design issues among researchers.

(ix) 16 Instruction Enhancement Program (IEPs) held to train the faculty members of 60 PIs in the area of VLSI/ System design.

(x) 27 patents have been filed and about 1500 research papers have been published in Conference proceedings / Journals.

(xi) Students being sent regularly to Semiconductor MNC (Intel/ NXP) for internship of 6 m-1year. About 100+ PPOs made. The access to the online trainings of entire design flow from CDN/ SNPS/ Mentor/ ARM are made available to students of 60 Precipitating Institutions.

(xii) 85 PhDs seats (45 Full-Time + 40 Part-Time) sanctioned for SMDP-C2SD institutions under Visvesvaraya PhD Scheme in academic year 2015-16 to 2017-18 and short term courses were organized under Network PhD programme.

B. M.Tech andM.Des Programme in Electronics Product Design:

To train manpower in the area of Electronics Product Design for designing innovative products, rapid prototyping & development and hands-on experience with cutting edge technology and processes, MeitY has initiated following programme with an objective to promote indigenous design and development of Electronics System in the country.

a) M.Des programme/Executive development programme in Electronics Product Design:M.Des programme/Executive development programme in Electronics Product Design has been initiated at IIT Guwahati in March 2021 to graduate 120 M.Des students and 4 PhD Student in Electronics Product Design over the period of 5 years. Besides this, Executive Development Programme will be conducted for 200 Industry experts.

b)Special Manpower Development Programme (SMDP)- M. Tech. in Electronic Product Design and Skill Development: M. Tech. in Electronic Product Design and Skill Development has been initiated at IISc Bangalore in March 2021 to train 305 Students/Faculty (125 students via M.Tech Programme, 144 Students via Short-term Certificate//Workshop and 36 Faculties vis Faculty Development Programme ) over the period of 5 years.